Computer Simulation Technology
 
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3D EM simulation of mixed analog / digital multilayer PCB

This article describes the use of CST MICROWAVE STUDIO® (CST MWS) to solve a coupling problem in a mixed analog – digital multilayer PCB card. The work was carried out by Mr. Zeev Iluz, Alvarion, Ltd.

The PCB is made of 14 layers and contains several A/D convertors, which operate at f=20MHz. Each A/D has 12 digital outputs and the traces to the FPGA are routed in two different layers. After manufacturing and testing the first prototype by transmitting the periodic digital pulses from the first A/D, a high signal in the second A/D analog port was detected [Figure 1], which shows a strong coupling from the first A/D (output traces) to the second A/D (input trace).

The second A/D analog trace is in the top layer while the first A/D digital traces are in internal layers. All layers are separated by a metal ground and an isolation higher then 80dB is expected. However, in figure 1 it can be seen that the isolation between the traces is about 80dB(left)-40dB(right)=40dB. This is a very high value that indicates there is a poor isolation despite the presence of the metal ground.


The input power at the first A/D (left) and the power level at the second A/D (right) while the first is transmitting
Figure 1: The input power at the first A/D (left) and the power level at the second A/D (right) while the first is transmitting

In order to locate the source of error in the board design, the full-wave 3D-Simulation tool CST MICROWAVE STUDIO® (CST MWS) was used. This is necessary due to the complexity of the board since all 3D features such as vias, bond wires and breaks in ground and power planes are taken into account. The board was imported in CST MWS by using the ODB++ format extracted from Mentor Graphics® [Figure 2].


The first A/D output
Figure 2: The first A/D output

The layers thickness and R, L, C components were defined. Gap source ports between the outputs of the first A/D to the FPGA and the second A/D input were easily defined in CST ODB++ import software.  Since only the A/D connection are the point of interest, only the relevant area of the board was imported [Figure 3].


CST MWS 14 layer PCB Model with lumped elements and discrete ports
Figure 3: CST MWS 14 layer PCB Model with lumped elements and discrete ports

All the 12 traces from the A/D (input) were terminated with 50 ohm ports at both ends. In order to read the coupling to the second A/D output, this was terminated with a 50 ohm port as well (port 26).


The coupling to the second A/D input
Figure 4: The coupling to the second A/D input

All 12 ports from the A/D input traces were simulated. The S-Parameters in figure 4  which shows that the traces 6,10,11 and 12 have a high coupling to the A/D output compared to all other traces, whereas trace 11 has 40dB more coupling than the other traces. From these S-Parameter results we are now able to locate the trace 11, which has a strong coupling to the A/D output (port 26).


2D amplitude at the top layer with trace 11 excitation
Figure 5: 2D amplitude at the top layer with trace 11 excitation

The 2D-plots in figure 5 and figure 6 shows the strong coupling that is present.


 2D amplitude at trace 11 layer
Figure 6:  2D amplitude at trace 11 layer

Going down to the layer of trace 11, figure, 6, assists in locating the via that caused the coupling.


Modification of board by cutting of trace
Figure 7: Modification of board by cutting of trace

In order to validate that this via caused the problem we cut the trace that leads to it and measured the power at the second A/D input. The location of the cut in the trace is shown in figure 7.


Original and modified board S-Parameters, S26,11
Figure 8: Original and modified board S-Parameters, S26,11

The comparison between the original board and the cut trace can be seen in the figure 8. By cutting the corresponding trace, the coupling to the A/D output can be reduced by as much as 50dB.


Electric field distribution for a) original and b) modified board
Figure 9: Electric field distribution for a) original and b) modified board

The plots in Figures 9a) and 9b) show the electric field in the trace before and after the modification. The improvement in the results can also be seen in the measurement results of the power spectrum density in figure 10.


Measured power spectrum density for modified board
Figure 10: Measured power spectrum density for modified board

A new layout was designed in which all traces were routed far away from this via. The simulations were repeated for the new layout which indicated that the problem was erradicated.

This example gives an insight into the usefulness of simulation of problems that cannot be investigated easily via measurement and allows the engineer to carry out virtual experiments as demonstrated here with the cutting of the signal trace. Experiments may show the presence of a particular problem but not its location.

Even when the problem has been located, further prototypes and experiments are costly and time-consuming. CST MWS offers a straightforward workflow for the set-up and simulation of such problems via its advanced user-interface and EDA interfaces. The time domain approach used for this simulation, which also delivers automatically frequency-based quantities such as S-Parameters and user-defined frequency domain field monitors, provides the most appropriate simulation technique for the accurate simulation of mixed-signal and digital problems. 

Courtesy and permission of Alvarion, Ltd, Tel-Aviv, Israel.


CST Article "3D EM simulation of mixed analog / digital multilayer PCB "
last modified 22. Oct 2008 6:05
printed 6. Jan 2009 11:39, Article ID 425
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