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Using CST MWS for Signal Integrity problems

In recent years the modern electronic systems are moving towards higher complexity circuits with faster signal transmission rate and operating frequency. Signal Integrity problems are a very important for design engineers and, due to stringent market requirements, full wave simulation is required.

The S-parameters of two complex multilayer PCB (Fig.1 and Fig.3) are measured by means of a network analyzer and the results are compared with those from CST MWS.


Top/bottom 50mm microstrips in 4 layer PCB
Figure 1: Top/bottom 50mm microstrips in 4 layer PCB


Comparison between measured and simulated S-parameters results
Figure 2: Comparison between measured and simulated S-parameters results


500mm long stripline in a multilayer PCB
Figure 3: 500mm long stripline in a multilayer PCB


Comparison between measured and simulated S-parameters results
Figure 4: Comparison between measured and simulated S-parameters results

As shown in Figures 2 and 4, the CST MWS results are in good agreement with measurements. Futhermore, an equivalent electromagnetic model of the Surface Mounted Adapter (SMA) is also developed and incorporated in the structure of the simulated board in order to evaluate the effect of the introduced discontinuities.

The surface current is evaluated by means of CST MWS and a 3D plot is illustrated in Fig.5


3D Surface current plot on SMA connectors
Figure 5: 3D Surface current plot on SMA connectors


CST Article "Using CST MWS for Signal Integrity problems"
last modified 12. Jan 2006 5:02
printed 15. May 2008 6:10, Article ID 224
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