SPICE Network parameter extraction

A physically based method is used for estimating the equivalent circuit model of an SMA connector soldered on the top plane of a multi-layer board and connected to a single-end stripline. Starting from the scattering parameters (S-parameters) evaluated using a simulation software package, the equivalent circuit is extracted by modeling each part of the structure. The circuit is then validated by comparing the outputs obtained via circuit-level simulation of the extracted physical circuit with those computed by means of the full wave solution. Read full article..

In this article the simulation of parasitic effects in a standard IC package is shown. The transient simulator in CST MICROWAVE STUDIO® (CST MWS) offers the advantage, that effects such as crosstalk and signal delay can be investigated in both time and frequency domain. Additionally, the simulation results can be used to generate an equivalent RLC network model that has the same S-Parameters as the 3D EM simulation but can be included in the overal circuit simulation of the logical parts of the IC. Read full article..

The target of this study was to understand the impact of low cost digital (=non-RF) packages on high-speed interface drivers and receivers. The studied low cost package was a 64-pin SQFP with dimensions 10x10 mm2, and with body thickness of 1 mm. The 1.4x1.4 mm2 IC with an active area of 0.01 mm2 was mounted on silicon substrate. The bond wires were of gold, with wire diameter 20 µm with bond pad pitch of 70 µm. The considered package contains the physical layer of a serial high-speed chip-to-chip interface circuit, operating with data rates up to 1 Gbit/s. Read full article..