Fewest Vias Design for Microstrip Guard Trace by Using Overlying Dielectric
Yung-Shou Cheng, Wei-Da Guo, Guang-Hwa Shiue, Hung-Hsiang Cheng, Chen-Chao Wang, Ruey-Beei Wu
Electrical Performance of Electronic Packaging, 2008 IEEE-EPEP
27-29 Oct. 2008
The unwanted ringing noise owing to the resonance related to the spacing of shorting vias on microstrip guard traces might degrade the signal quality of adjacent interconnects. This paper proposes a novel design method to reduce the ringing noise by overlying a thin dielectric with higher dielectric constant onto the original microstrip substrate. It has the advantages of minimizing the required number ofshorting vias and achieving less restricted circuit routing.
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