Semiconductors and Electronic Components

The global semiconductor industry is a multi-billion dollar sector, and forms the foundation of countless other industries. Simulation can help designers and engineers check the behavior of a component before committing to manufacturing, reducing the time and capital needed to realize a new design.

CST STUDIO SUITE® includes both circuit simulation and full-wave 3D simulation tools to allow the properties of complex components such as intricate packages and systems-on-chip to be calculated before fabrication. With transient EM/circuit co-simulation, non-linear circuit components can even be included inside 3D models, combining the advantages of both types of simulation.

CST DESIGN STUDIO® includes a broad library of semiconductor components, along with the ability to simulate arbitrary components using SPICE and IBIS models, and its support for a wide range of EDA tools means that it can slot into many workflows. Optimization and yield analysis tools meanwhile allow engineers to improve the efficiency of their designs and help them get the most out of every die.

Semiconductors and Electronic Components

All Articles

CST FilterDesigner 2D Flyer

CST FilterDesigner 2D Flyer Document type
FilterDesigner 2D is a fully-integrated tool for the design and synthesis of planar and circuit filters in CST®STUDIO SUITE®. Built on Nuhertz Technologies’ well-reputed and mature technology, FilterDesigner 2D can be used to quickly select an appropriate filter type and generate a simulation-ready circuit or 3D model. Read full article..

Power Delivery Network PDN Analysis

Power Delivery Network PDN Analysis
This webinar consists of two parts. The first part will highlight the role of simulation in the design of PCB power delivery network (PDN) systems, including the voltage regulator module (VRM), decoupling capacitors (decap), and the spreading parasitic of the power/ground plane. The PDN analysis will focus on both the static case (voltage or IR-Drop) and AC analysis in the frequency domain, with the main focus on PDN impedance. In addition to the AC analysis, we will also demonstrate the decap optimizing tool, which is mainly used to optimize the number of decaps while reaching the target impedance. A brief explanation about the SSO (simultaneously switching output) and the major challenges for simulating this (SI/PI co-simulation) will close the first part of this webinar. The second part of the webinar will cover the measurement methodology for the PDN impedance of the power supply plane of the PCB. This will include the measurement the PDN impedance from only one side of the PCB without the connector. Read full article..

3D EM Modeling of a DDR4 Memory Channel

3D EM Modeling of a DDR4 Memory Channel
The modeling section of the webinar will look at the importance of return path discontinuities. When should we use a 2D approach and when do we need 3D full-wave solver? Can we adopt a "cascaded S-parameter” approach to modeling a channel, where each component is simulated separately, or must we revert to "combined 3D modeling", in which the full channel – controller package, motherboard and DIMM connector – are combined in a single 3D CAD model? Read full article..

Simulation for EMC Performance in Modern Electronics

Simulation for EMC Performance in Modern Electronics
The design flow for a modern complex electronic device involves many stages, and the earlier potential EMC problems in the design are detected, the easier and cheaper it can be to mitigate them. In this webinar we will focus on two topics: shielding effectiveness of enclosures and routing of differential lines. Even though the topics sound unrelated, they can be efficiently simulated with the same methods. This webinar uses a realistic demonstrator PCB and enclosure, which were first shown in our webinar from November 2013, “EMC Simulation in the Design Flow of Modern Electronics” – however, this webinar explores different topics and can be watched as a standalone. Read full article..

Lead Frame Package Layout and EM Simulation using CAD Design Software and CST STUDIO SUITE

Lead Frame Package Layout and EM Simulation using CAD Design Software and CST STUDIO SUITE Document type
Lead frame packages are an established packaging technology for many types of applications, due to their manufacturing and cost advantages. When the limits of this technology are pushed, careful analysis of these packages using state-of-the-art design and simulation tools becomes essential. This technical white paper describes a workfl ow of rapid design and simulation for lead frame packages using CAD Design Software’s (CDS) Electronics Packing Designer (EPD) software, and CST STUDIO SUITE®. Read full article..

Dielectric and conductor loss simulation

Dielectric and conductor loss simulation
The drive toward increased integration densities of electronic devices has led to smaller transmission line conductor sizes and structures consisting of multiple lossy dielectrics. At the same time, higher bit-rates of 100 GBits/s, has led to increased loss due to skin-effects. Losses in these types of transmission lines are often difficult to predict due to non-ideal transmission line cross-sections, including surface roughness and edge-shape effects. To develop realistic simulated insertion loss, all insertion loss components need to be considered and accounted for. Dielectric and conductor loss components require careful material parameterization and structure set up. An overview of these parameterizations and set up will be given, including the trace cross-section shape influence on conductor loss, an often overlooked phenomenon. Options for including surface roughness contribution to conductor loss, for both full wave 3D and analytical models, will be explored. Read full article..

High Speed and High Power Connector Design

High Speed and High Power Connector Design
As data transfer rates increase and complexity grows, designing high-speed connectors is becoming increasingly challenging, especially with multiple compliance regulations to meet. A precise analysis of the connector in isolation as well as the connector and PCB interface is essential, and can be only achieved by extensive use of 3D EM simulation during the development cycle. In this webinar we will present the benefits of CST STUDIO SUITE® 2013 for the simulation of high-speed connectors. Multiple examples, including display connectors and USB 3.0 connectors will be used to demonstrate features such as online TDR and cross-probing, with the aim of identifying impedance mismatches and discontinuities. A low-speed high-power connector analysis using multidisciplinary approaches (including electrical and thermal effects) will also be presented. Read full article..

High-Speed Serial Link: Full-Wave EM Modeling Methodology and Measurement Correlation

High-Speed Serial Link: Full-Wave EM Modeling Methodology and Measurement Correlation
Passive channels pose significant challenges to serial link transmission for single-ended buses running at very high speeds. With the combined increase in data rates and routing density, crosstalk has become a major source of noise in current PCB designs. Reduced bit-to-bit, bytelane-to-bytelane and channel-to-channel spacing makes timing/voltage active margin analysis more challenging especially for single-ended and bidirectional buses. For this reason simulating a full pad-to-pad link is becoming increasingly desirable. Being able to quickly identify worst case lanes and quantify crosstalk impact is crucial. Such an approach is still very challenging especially for complex systems where the location and nature of aggressor signals change when moving from one component (package, board and connector) to the next. This webinar will cover different aspects of the challenges in high-speed link modeling including chips, packages, PCB’s, connectors and their interactions. A real-world high-speed memory bus test vehicle will be used for the correlation study. Full-wave electromagnetic modeling of the complete 3D link as well as a hybrid 2D/3D link modeling approach will be demonstrated and correlation for both passive (TDR/VNA) and active (system margins) measurements will be presented. The impact on system-level performance is analyzed by comparing results with and without crosstalk from adjacent lanes. Read full article..

Eddy current and proximity effect - The jumping ring experiment

Eddy current and proximity effect - The jumping ring experiment
This article serves to demonstrate the ability to take into account skin and proximity effects in conducting coils. A simple model of the jumping ring experiment is taken for this purpose but the principles involved can be applied to more complex problems. Quantities such as induced voltages, self and mutual inductances can be calculated in the CST EM STUDIO® low frequency eddy current solver. Read full article..

CST STUDIO SUITE Brochure

CST STUDIO SUITE Brochure Document type
CST STUDIO SUITE 2016 is the culmination of years of research and development into finding the most accurate and efficient computational solutions for lectromagnetic (EM) designs. From static to optical, and from the nanoscale to the electrically large, CST STUDIO SUITE includes tools for the design, simulation and optimization of a wide range of devices. Analysis is not limited to purely EM effects, but can also include thermal and mechanical effects and circuit simulation. Read full article..

Thermal Modeling of Heat Sinks

Thermal Modeling of Heat Sinks
Heat sinks serve to transfer the generated heat of an electronic system away from the active and passive electronic components and toward the ambient environment. This article shows how temperature distributions and heat flows can be efficiently simulated using CST MPHYSICS® STUDIO (CST MPS). Read full article..

EMC simulation of consumer electronic devices

EMC simulation of consumer electronic devices
All consumer electronic devices need to meet EMC standards. By including EMC compliant design at an early stage, additional costly iterations can be avoided later on down the line. In this webinar we will present how board-level EMC design can significantly reduce emissions at their source. We will then focus on system level EMC, discussing different approaches of segmenting the system for an efficient simulation workflow. Finally we will analyze immunity, by demonstrating how different return current path configurations can affect performance of the device due to cable entry susceptibility. Read full article..

Non-Linear Simulation of a Photonic Amplifier

Non-Linear Simulation of a Photonic Amplifier
This article demonstrates the modeling of a third-order non-linear silicon-on-insulator waveguide at optical frequencies, using time-domain simulation in CST MICROWAVE STUDIO®. The non-linearity gives rise to degenerate four-wave mixing, allowing the waveguide to be used as a photonic amplifier. Read full article..

TSV and Interposer: Modeling, Design and Characterization

TSV and Interposer: Modeling, Design and Characterization
3D ICs promise “more than Moore” integration by packing a lot of functionality into small form factors. Interposers along with TSVs play an important role in 3D integration from an electrical, thermal and mechanical point of view. The goal of this webinar is to demonstrate a complete design methodology for TSVs used in interposers by means of three 3D full wave electromagnetic simulations. A comparative analysis of various configurations of signal delivery networks in 3D interposers for high speed signal transmission is presented. Based on the results, design guidelines are outlined with the objective of minimizing the crosstalk among TSVs, reducing the insertion loss and generally improving the electrical performance of interconnections in silicon and glass interposers Read full article..

Chip Package Board: Constraint Driven Co Design

Chip Package Board: Constraint Driven Co Design
Memory interfaces have single-ended data rates in the 1GHz-plus range and serial links are running upwards of 10 gigabits per second. A precise analysis of each of these signals is required at silicon, package and board level. The design and optimization performed on each one of these interconnection levels must be done in a global context. This webinar proposes a global methodology which combines three dimensional (3D) electromagnetic (EM) analysis for PCB and package with chip power switching macro-modeling. Difference between segmentation approach (where silicon, package and PCB are analyzed separately and then combined with standard cascading technique) and integrated/global approach (where chip, package and PCB are analyzed as single entity in a co-simulation mode) are discussed and based on the results, guidelines are outlined. Read full article..

Matching circuit optimization for antenna applications

Matching circuit optimization for antenna applications Document type
Impedance matching is an essential part of antenna design. The input impedance of an antenna needs to be reasonably close to the amplifier impedance (e.g. 50 Ohm), otherwise the signal is reflected back to the amplifier and not radiated by the antenna. In many applications matching circuits consisting of discrete inductors and capacitors, or transmission lines are used to improve the impedance matching characteristics of the antenna. This white paper discusses the optimization of matching circuits especially to antenna applications. Although the design of matching circuits sounds simple, there are many practical considerations that need to be addressed. Read full article..

Direct transient co-simulation of a Step Recovery Diode (SRD) Pulse Generator

Direct transient co-simulation of a Step Recovery Diode (SRD) Pulse Generator
The unique network co-simulation feature in CST STUDIO SUITE™ 2009 enables a direct transient simulation of a 3D CST MICROWAVE STUDIO® (CST MWS) structure with non-linear lumped components or circuit networks in CST DESIGN STUDIO™ (CST DS). This article shows the application of this feature to the simulation of a Step Recovery Diode (SRD) pulse generator. Read full article..

Signal Integrity Analysis of a Complex Multi-Layered Package

Signal Integrity Analysis of a Complex Multi-Layered Package
This article concerns the Signal Integrity (SI) analysis of a multi-layered package imported from Cadence® Allegro® via the CST Cadence Link. The typical workflow for setting up and simulating such models in CST MICROWAVE STUDIO® (CST MWS) as well as in CST DESIGN STUDIO™ (CST DS) are presented. Simulated results correlate well with measurements. Read full article..

Electron Gun for Lithography Applications

Electron Gun for Lithography Applications
This article describes briefly the setup for an electron gun as would be used for example in electron beam lithography or for electron microscopes. Read full article..

Nanophotonics and integrated optics - Photonic Crystal Cavities

Nanophotonics and integrated optics - Photonic Crystal Cavities Document type
This whitepaper gives a general overview on different concepts of photonic crystal cavities. Important figures such as the transmission, the mode volume and the quality factor are discussed. The presented information will help the reader to decide which type of photonic crystal cavities will be most suited for the application in view. A design example for a WDM channel filter is given in order to illustrate the design process for a photonic crystal cavity. Furthermore two experimental examples from recent research are shown to demonstrate the wide range of applications in which photonic crystal cavities could be used. Read full article..

New simulation workflows for predicting radiated emissions

New simulation workflows for predicting radiated emissions
In this video powerful new workflows for reliably predicting radiated emissions from electronics systems will be discussed. We start by importing a complex PCB model into CST PCB STUDIO and applying new EMC rules checking algorithms to rapidly identify potential weaknesses in the design. Critical nets, planes and vias are then analyzed to determine the differential mode (DM) to common mode (CM) conversion caused by driver skew and line imbalance. Finally, the resulting transient noise waveforms are injected into a 3D model of the connector/cable assembly and radiated emissions predicted. Important features of a typical anechoic chamber test are represented in the model using external ground plane reflections and cylindrical scanning to detect the peak emissions. Read full article..

From Layout to Eye Diagram CST STUDIO SUITE and the EDA Workflow

From Layout to Eye Diagram CST STUDIO SUITE and the EDA Workflow Document type
Ensuring good Signal Integrity (SI) in high-speed communication PCBs is becoming more challenging as layouts become more complex, the number of layers increases and the boards get smaller. A full-wave three dimensional (3D) electromagnetic simulator can be used to simulate and visualize the propagation of electromagnetic fields across PCBs. This article will describe how CST STUDIO SUITE® can be successfully used to characterize the response of high-speed channels, and how typical SI results such as S-parameters, Time Domain Reflectometry (TDR) data and eye diagrams can be numerically calculated to predict the response of a channel. The article will also discuss how to modify layouts in order to improve channel performance, and provide some design guidelines. Read full article..

Simplifying the Workflow - benefits of the CST and Cadence Partnership

Simplifying the Workflow - benefits of the CST and Cadence Partnership
Cadence and CST offer very effective solutions for high speed PCB/package co-design. Two different workflows will be presented: 1) the “EDA centric” approach that allows the full wave simulation to be run as a fully background process with back annotation of the results to the layout environment and 2) the “EM centric approach” that focuses on the full wave environment. The benefits of such level of integration in the daily work of design engineers will be discussed. Read full article..

EDA workflow using CST MICROWAVE STUDIO - from Layout to Eye Diagram

EDA workflow using CST MICROWAVE STUDIO - from Layout to Eye Diagram
This webinar will present 3D EM Signal Integrity simulation using CST MICROWAVE STUDIO. It will demonstrate the PCB layout import and the 3D full wave simulation of a realistic multilayer PCB. Standard outputs like S-Parameters, Time Domain Reflection (TDR) and Mode Conversion will be shown along with eye diagram and field distribution. A comparative analysis between time and frequency domain solver will be also presented and trade-offs will be discussed. Read full article..

Electrical Performance of High Speed Signaling in Coupled Microstrip Lines

Electrical Performance of High Speed Signaling in Coupled Microstrip Lines
The electrical performance of high speed signaling in coupled differential microstrip lines is analyzed. Based on the modal decomposition analysis, the cancellation frequency in the single-ended insertion loss response is explained and a closed formula is presented for the prediction of such resonant frequencies. Sensitivity analyses are also performed in order to investigate the impact of the solder mask layer and the differential microstrip geometry on the cancellation frequency. Read full article..

Power Integrity Simulation for High Speed Board using CST PCBS

Power Integrity Simulation for High Speed Board using CST PCBS
Power Integrity simulation for a high speed board, PCI-Express. using CST PCBS is shown here. The first simulation is the static power integrity simulation, known as IR-Drop. The second simulation is the high freq. power integrity simulation, whereas the decoupling capacitors are also taken into account to reduce the impedance of the board. Read full article..

Simulation of Photonic Crystal Cavities

Simulation of Photonic Crystal Cavities
This article demonstrates how properties of the resonant modes of photonic crystal (PhC) point defect cavities are obtained from transient solver simulations using CST MICROWAVE STUDIO®. In this example a single point defect in a triangular lattice of air holes in a high refractive index slab is used. Properties of particular interest are: the resonance frequency, intrinsic Q factor and field distribution of the resonant modes. The cavity is excited using discrete ports, and the spectral features are recorded with point probes. The Q factor is determined from the energy decay rate and using auto regressive filtering. 2D and 3D field monitors record the field distributions. Read full article..

Characterization of Photonic Structures with CST MICROWAVE STUDIO

Characterization of Photonic Structures with CST MICROWAVE STUDIO Document type
Stefan Prorok, Hamburg University of Technology We present an overview of our current research activities in silicon photonics and thermal barrier coatings. Doing so, we will comment on how CST Microwave Studio can be used to design strip waveguides, micro ring resonators, as well as 2-D and 3-D photonic crystal structures. Particularly we will concentrate on the discussion of photonic crystal micro cavities which can be used as electro-optic modulators. It will be shown that MWS provides all the functionality to optimize and characterize optical micro cavities. The appearance of resonant modes is adjusted through eigenmode calculation of the photonic crystal waveguide modes. Time domain simulation with discrete port excitation is applied to calculate the intrinsic Q-factor of the cavity. Waveguide ports are used to model experimental conditions of excitation with strip waveguide modes. Field monitors help to understand the mechanism of energy loss from the cavity. The simulation results are compared to measurements on fabricated structures. As possible application we will show a hybrid silicon organic hetero structure cavity for GHz electro-optic modulation. Read full article..

Calibration of Probes for EMC Near-Field Scanning

Calibration of Probes for EMC Near-Field Scanning Document type
Matthias Spang, University Erlangen-Nuremberg In order to carry out near-field scans of printed circuit boards for EMC investigations, knowledge of the electric and magnetic fields above various calibration boards is necessary. CST Microwave Studio’s transient solver is therefore employed to calculate the near-field patterns on a scanning plane above various microstrip structures. After a spatial 2D-Fourier-transformation, the field values and the measured probe output signals are used to determine the field probe’s receiving characteristics. The results of this calibration process are then verified by applying them on further field measurements with the probe above another microstrip structure and comparing the obtained field strengths with respective simulations again. To obtain a high spatial field resolution, roughly 2.5 million meshcells are used. The frequency band of interest extends from 1MHz up to 3GHz so that great importance is attached to sufficient energy decay. Read full article..

Signal Integrity Analysis in Printed Circuit Board and Package Design

Signal Integrity Analysis in Printed Circuit Board and Package Design Document type
Z. Shen, Avago Technologies, Inc. Video of an Innovations 2009 workshop series presentation. Read full article..

Transient Co-Simulation of a Hybrid Ring Mixer with Matching Network

Transient Co-Simulation of a Hybrid Ring Mixer with Matching Network
This article demonstrates a strong feature of CST STUDIO SUITE™: Co-Simulation of a hybrid mixer with CST MICROWAVE STUDIO® (CST MWS) and CST DESIGN STUDIO™ (CST DS). A full 3D model is simulated and matched to a network using the in-built circuit simulator. Measured results compare well to the simulated results. Read full article..

Using Full Wave Solvers for Practical Analysis of Capacitor Mounting Structures

Using Full Wave Solvers for Practical Analysis of Capacitor Mounting Structures Document type
Scott McMorrow, Steve Weir, Teraspeed Consulting Group LLC Fabrizio Zanella, CST of America Read full article..

Transient Simulation of a System-in-Package (SiP)

Transient Simulation of a System-in-Package (SiP)
This article summarises the simulation of a System-in-Package (SiP) model using the CST MICROWAVE STUDIO® (CST MWS) Transient Solver to determine the S-Parameters, field distribution and system response when excited with 10 and 20 GHz pulses with additional noise signals. An analysis of the SiP with a board mounting and its effect on the is resonant frequency is also performed. The EMC behaviour of the SiP with and without the mounted board is also considered. Permission and courtesy of AET Inc. Japan. Read full article..

IC Package Simulation

IC Package Simulation
In this article the simulation of parasitic effects in a standard IC package is shown. The transient simulator in CST MICROWAVE STUDIO® (CST MWS) offers the advantage, that effects such as crosstalk and signal delay can be investigated in both time and frequency domain. Additionally, the simulation results can be used to generate an equivalent RLC network model that has the same S-Parameters as the 3D EM simulation but can be included in the overal circuit simulation of the logical parts of the IC. Read full article..

CMOS VCSEL Driver Design using CST MICROWAVE STUDIO® and Agilent ADS

CMOS VCSEL Driver Design using CST MICROWAVE STUDIO® and Agilent ADS
CST MICROWAVE STUDIO® and Agilent ADS have been successfully employed in this OEIC driver design - an example of a high speed analog/broadband IC application.The package model was imported from Agilent momentum and the model was simulated upto a 100 GHz in CST MWS.The resulting eye diagrams of the driver design from CST MWS are compared with those from Agilent momentum and other test cases. Read full article..

Spiral Inductor

Spiral Inductor
The 3rd Dimension: This inductive, mostly planar structure contains an air bridge. Read full article..

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