CST – Computer Simulation Technology


Data Exchange Options

A smooth industrial design flow demands a push-button solution for importing PCB designs from common EDA software into a simulation tool. Regardless of whether you are dealing with designs from Altium (ODB++), Cadence, Mentor Graphics or Zuken, you only have to select the desired input file and CST BOARDCHECK™ starts conversion automatically. An important feature during the import is the detection and auto-healing of geometric errors in order to prevent problems in subsequent analyses.

Data exchange options include all common EDA imports (see Technical Specifications).

Tabular violation report in HTML format, e.g. for rule Critical Differential Net Length Matching and Spacing


As CST BOARDCHECK analyzes a design, it records all of the violation information in HTML output file(s). Each result set has a main HTML page with hyperlinks to each of the enabled rules. Clicking on a hyperlink brings up the specific violation details for that rule.

Once violations are identified for a PCB design, the ability to find and fix those violations quickly is vital to completing the design on-time. To help with this, CST BOARDHCECK provides graphic violation views while the user navigates through the enabled rules and the lists of violations. When the user clicks on a violation, the board view is zoomed to the location of the violation, and the net is highlighted, or a highlight box is drawn around the violation, as appropriate.

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