CST – Computer Simulation Technology

4 x 1 Pin-fed Patch Array with Underside Feed | Antenna Magus

Image of the 4 x 1 Pin-fed patch array with underside feed.

This 4-by-1 patch array design in Antenna Magus combines the design of the individual patch elements in the array with the design of a corporate feed network realized in microstrip. The feed network is located on a second substrate on the underside of the ground plane, with the patch elements connected to the feed network with pins (vias) that pass through small holes in the ground plane. This reduces unwanted coupling between the radiating elements and the microstrip feed network - which may be a consideration when using other feed methods. The 4-by-1 patch array can be used to realize an antenna with a fan-shaped beam and a gain of around 13 dBi for applications such as point-to-point communication links. The array is also well suited for use as a sub-array or building-block for larger planar or wrap-around arrays....

Example of the feed network designed by Antenna Magus.

Specific substrate properties, as well as the input resistance desired at the corporate feed point (between 50 Ω and 100 Ω) can be designed for in Antenna Magus. The dimensions of a single resonant patch are constrained by the substrate parameters, while the limits on the characteristic impedance of the feed lines are dictated by practical manufacturability considerations. For example, if the feed network design requires microstrip lines with characteristic impedances significantly higher than say 100 Ω, the line widths may become too narrow for etching, depending on the substrate height and relative permittivity. Conversely, if the port input resistance is chosen too low, the line widths might be unacceptably wide.

The following figure shows a design for 5.2 GHz with 50 Ω input resistance on a 787 Μm, RT/duroid substrate with Εr = 2.2.

50 Ω design example at 5.2 GHz on a 787 Μm, RT/duroid substrate with Εr = 2.2.

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