Signal Integrity of Cadence Allegro Backplane Trace Import
A portion of a backplane, designed with the Cadence Allegro® layout tool, is imported into CST MICROWAVE STUDIO®. This section consists of a differential pair with vias which go through the board. The structure was analyzed in Microwave Studio. The...
Signal Integrity of High Speed Flip Chip Package
This article describes how CST MICROWAVE STUDIO® is used to analyze the signal integrity of a flip chip package. The study is to determine the effect of ground planes on insertion loss of the package signals.
Full Package Signal Integrity Analysis
This article presents the use of CST MICROWAVE STUDIO® (CST MWS) for the simulation of large IC packages. From the time domain simulation network parameters can be extracted and further processed in CST DESIGN STUDIO™.
Power Integrity Simulation for High Speed Board using CST PCBS
Analysis of a SiP Package Using CST MICROWAVE STUDIO®
This article serves to demonstrate the simulation of a System in Package (SiP) using CST MICROWAVE STUDIO® (CST MWS).
This application is shown with the permission and courtesy of AET Inc. Japan.