CST – Computer Simulation Technology

Design of Circularly Polarized Patch Antennas

A reader is a radio frequency (RF) transmitter and receiver, controlled by a microprocessor or digital signal processor. The reader, using an attached antenna, captures data from tags then passes the data to a computer for processing. Here the design flow of a patch RFID-antenna for frequency range: 908.5 - 914 MHz (RFID band of Korea) using CST MICROWAVE STUDIO® (CST MWS) is described. This article is published with the permission and courtesy of Prof. Bierng-Chearl Ahn and his colleagues at Chungbuk University, Korea.

Figure 1 shows the proposed structure of the antenna and the design parameters.



Figure 1: Design parameters of RFID-antenna

The design parameters define the operation and the performance of the antenna. The operating frequency determines the size of the patch antenna: W ≈ L = 0.4 λ, while truncation t / W, as well as vertical height of the ground plane, the axial ratio. The ground plane size controls the gain of the antenna while the distance between ground plane and the patch affects the bandwidth. On the other hand, the size of the feed gap influences the impedance matching. The geometry was drawn and the parameters of the antenna optimized through simulations performed in CST MWS. Figure 2 shows the CST MWS model of the patch antenna, the final design parameters and the manufactured antenna. ...



Figure 2: The geometry of the patch antenna seen in CST MWS together with fabricated one

 

The measurements were made and compared with the simulations. The plots of the reflection coefficient and the gain are shown in Figure 3. It can be seen that the measurement results agree with the simulations very well.

Figure 3: Comparison results between measured and simulated values; All simulations were performed in CST MWS

The patch antenna was further miniaturized by placing dielectric material between the patch and the ground. The simulated and consequently fabricated miniaturized antenna can be seen in Figure 4 with the final design parameters.



Figure 4: RFID patch antenna miniaturized by dielectric loading

The simulations are compared to the measurements in Figure 5. It can be seen that with the dielectric between patch and the ground, the better resonance at frequency of 900 MHz can be achieved.



Figure 5: Simulation and measurement results for the antenna with dielectric

 

As the last step the gain was increased via designing 2-Element SFADP Array. First, the distance between elements was optimized using CST MWS in order to obtain maximum gain. After that the feeding network and power divider circuit (Figure 6) were designed.

Figure 6: Feeding network and power divider

The antenna array was manufactured and measured. The comparison plots between measurements and simulations can be seen in Figure 7 and 8.



Figure 7: Performance of the designed antenna


Figure 8: Performance of the designed antenna: axial ratio

In this article three RFID reader antennas were designed using CST MWS. Measurements of the fabricated antennas show good agreement with simulated results.

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