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CST – Computer Simulation Technology

IC Package Simulation

Continuously increasing frequencies in all areas of microelectronics enlarge the parasitic effects of interconnect networks and limit the performance of integrated circuits and systems. For instance, the serial inductances as well as mutual capacitances and inductances of bond wires and pins have a serious influence on the signal quality. In particular, they affect the signal shapes and lead to crosstalk problems. For complex shaped structures like packages and interconnects, the only reliable approach to predict parasitic effects is a full 3D field simulation. Time domain simulators such as the transient solver in CST MICROWAVE STUDIO® (CST MWS) have been proven to be well suited for this task, since they can deal with very large or complex structures and deliver information in both the time and the frequency domains. For the investigation a 24 pin high-speed IC package, the P-TSSOP24 IC package from Infineon Technologies AG shown in Figure 1, will be used....

Figure 1: The complete high speed IC package used for the simulations and its leadframe

The operating frequency range of interest is 1-2 GHz according to applications of mobile communication units (GSM 900 and GSM 1800 MHz). Hereby the largest grid cell size is chosen to be smaller than 1/15 of the shortest excited wavelength inside the material to provide sufficient sampling of the wave. The whole model consists of 43x46x12 cells which results to a total number of about 24000 mesh cells (see Figure 2). Each pin is provided with one discrete port at each end. As a result the structure has 48 ports in total. The impedance of each port is set to 50 Ohm. The metallic parts are assumed to be perfect electric conductive (PEC), while the other materials are defined by their permittivity and conductivity.

Figure 2: Position of the discrete ports at the start and end of each pin, as well as the mesh used for all computations

Different time signals are applied to the model. In Figure 3 (left), the results of a simulation with a digital pulse signal are presented. The first port is excited by a trapezoidal input signal with a hold time of 100 ps and rise and fall times of 20 ps. The total signal length amounts to 500 ps. Figure 3a shows the effectively transmitted signal as well as the reflection. As expected, the field effects occur most distinctly at the rising and falling flanks. Additionally, it is obvious that the crosstalk to ports 3 and 4 of the adjacent pin is pronounced and its influence is not negligible.

Alternatively, a standard broadband Gaussian pulse is used for the excitation to obtain the S-Parameters of the package. All 24 outermost ports were excited successively to receive a full S-parameter matrix. Each time signal required 82 s for computation. With an additional calculation time of 120 s for the mesh generation, the overall computation time was of about 35 min. Although not applied to this simulation, the dual processor and distributed computing features in CST MWS would reduce the computational time significantly. Figure 3 (right) shows some important S-parameters in a range of 0 to 30 GHz with port 1 being excited. Both of the upper graphs display the transmission and reflection of port 1 in dB, the other graphs represent the crosstalk to neighboring pins.

Figure 3: Digital pulse excitation signal and resulting output time signals (left) and S-parameter with excitation of port 1 (right)

In addition to the 1D results such as time signals or S-Parameters also 3D fields can be monitored at discrete frequencies. Figure 4 gives the current density which is calculated at a frequency of 5 GHz as an overlay of contour- and arrowplot. It is obvious that the current flows mainly in the excited first port but also the crosstalk current induced in the neighboring pins can be clearly noticed.

Figure 4: Contour and vector plot of the current density at 5 GHz

Since the direct usage of S-parameters (e.g. in form of a touchstone file) may be inconvenient for further circuit simulations of the IC, an equivalent circuit model is extracted and investigated in both frequency and time domain. The equivalent circuit model is based on a fundamental T-structured transmission line model as shown in Figure 5 (left). The left and right ends of this network coincide with two discrete ports in the 3D structure, that have to be defined in advance. The S-Parameters of the respective ports, obtained by the time domain simulation, are used to compute the values of L, C, R and G. This way, the best fit between zero and a predefined extraction frequency is achieved both for the phase and the absolute value. For this frequency range the model approximates the full dynamic performance of the interconnect. Additionally, if several transmission lines are considered in the parameter extraction, crosstalk between the line models has to be taken into account. The network is therefore extended by a coupling capacitance between the individual transmission lines and a mutual coupling between the inductances as shown in Figure 5 (right).

Figure 5: Fundamental transmission line model considering a coupling capacitance and inductive coupling

All error curves in Figure 6 (left) show the main characteristic of the transmission line model. The error always has its minimum at low frequencies (roughly between DC and the extraction frequency) which is the most important bandwidth for many simulation tasks. The model is therefore valid up to a certain frequency corresponding to a spatial dimension of the pin of approximately 1/10 of the wavelength. Obviously the lowest extraction frequency of 1 GHz yields an equivalent circuit which is very accurate at the extraction point and below. The maximal error in the range of DC up to 2 GHz is far below 1%. However, above 2 GHz the error of the model increases strongly. If the extraction frequency is selected to be at higher values, the match between DC and the extraction point is less precise, but there is a good agreement up to higher frequencies. The case of 10 GHz extraction frequency displays an average error of 5% between 0 and 10 GHz, while up to 15 GHz the maximal error is around 10%. For higher extraction frequencies, the assumptions of a transmission line are no longer valid and the resulting models become unusable. Due to the first order character of the network model, reliable parameter fits are obtained up to a spatial extension of about 1/10th of the wavelength . For many practical applications this range is sufficient. In the case of larger structures, higher order transmission line models can be used for approximation. Unfortunately the calculation of ‘true’ higher order models increases the optimization effort drastically. However the separation of the first order model into a number of serial similar transmission line models improves the approximation quality in both frequency and time domain noticeably. The effect of this so-called cascading is shown in Figure 6 (right), the extraction frequency for all curves was 1 GHz in this case.

Figure 6: Maximal error between field and circuit S-parameters for different extraction frequencies and for different numbers of cascades

In Figure 7 the original S-parameters gained from the field simulation are compared with the ones resulting from a SPICE simulation of the extracted model. The related curves show a very good agreement up to about 15 GHz.

Figure 7: Comparison of field and circuit S-parameters for an extraction frequency of 1 GHz, separated into two cascades

For most simulation tasks in digital systems, the time domain behavior of the equivalent circuit is even more important than the frequency response. The model derived at a frequency of 1 GHz is therefore investigated with different numbers of cascades in time domain. The circuit was excited at port 1 by a digital voltage pulse. The currents at the ports 1 to 4 are compared to the currents monitored in the discrete ports of the MWS 3D field simulation. Figure 8 (left) shows the transmitted current at port 2 which is the end of the excited pin. The extracted model is a very good approximation of the original signal, whereby the 2 cascade model displays more over-shooting than the circuit with 5 cascades. Especially the time delay is modeled very accurately. Finally, the crosstalk currents in the adjacent pin are compared in Figure 8 (right) only for the 5 cascades model. The simulation data is also well fitted with only small errors.

Figure 8: Comparison of the currents at the end of the pin (port 2) and of the crosstalk currents in the adjacent pin with the 5 cascades model

In this article, the inclusion of a full 3D field simulation of an IC package into a conventional circuit simulation tool like SPICE was investigated by different approaches. A simulation in CST MWS in the time domain was shown to be a powerful method for fast and accurate field solutions of the simulated IC interconnect. For high clock speeds, transient simulations using true digital waveforms as excitation signal represent a very flexible and fast approach.

The extraction of a transmission line based circuit model yields a very good approximation of the parasitic behavior of the package. These models are valid, with a reasonable error, up to frequencies for which the structure’s dimensions are below 1/10 of the corresponding wavelength. The generated circuit model was shown to provide a very satisfactory approximation of the electromagnetic behaviour not only in the frequency but also in the time domain.


The results for this article have partially been taken from: T. Wittig, T. Weiland, F. Hirtenfelder, W. Eurskens: Efficient Parameter Extraction of High-Speed IC-Interconnects Based on 3D Field Simulations Using FIT. Proceedings of the 14th International Zurich Symposium and Technical Exhibition on Electromagnetic Compatibility (EMC 2001), 2001, pp. 281-286

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