We all use rule checking when creating a printed circuit board design. However, most of the rules that we check against apply to manufacturing. Passing those rules will not guarantee that our board meets the stringent signal integrity, power integrity, and EMC requirements of today’s high speed, low power and highly integrated systems.
While some performance related measures (such as differential net length) can be checked for in modern PCB layout platforms, the thresholds for these measures must be defined by the user. Unless this user is a seasoned expert in the field of signal integrity power integrity and EMC, they will run a high risk of choosing thresholds that are too conservative or too aggressive, leading to over-design or failure.
This presentation introduces CST BOARDCHECK®: a smart design rule-checking platform that includes knowledge of signal parameters such as rise/fall times, voltage swing, and data rate. CST BOARDCHECK assigns a validated set of geometrical thresholds to each net individually, depending on the signal that it carries (DDR, PCI, Ethernet, USB). Learn how CST BOARDCHECK takes rule checking to the next level.