CST – Computer Simulation Technology

PCB Design Rules that really matter

We all use rule checking when creating a printed circuit board design. However, most of the rules that we check against apply to manufacturing. Passing those rules will not guarantee that our board meets the stringent signal integrity, power integrity, and EMC requirements of today’s high speed, low power and highly integrated systems.

While some performance related measures (such as differential net length) can be checked for in modern PCB layout platforms, the thresholds for these measures must be defined by the user. Unless this user is a seasoned expert in the field of signal integrity power integrity and EMC, they will run a high risk of choosing thresholds that are too conservative or too aggressive, leading to over-design or failure.

This presentation introduces CST BOARDCHECK®: a smart design rule-checking platform that includes knowledge of signal parameters such as rise/fall times, voltage swing, and data rate. CST BOARDCHECK assigns a validated set of geometrical thresholds to each net individually, depending on the signal that it carries (DDR, PCI, Ethernet, USB). Learn how CST BOARDCHECK takes rule checking to the next level.

Presenter

Klaus Krohne
  • Dr. Klaus Krohne
  • received his electrical engineering degree (Dipl.-Ing.) from the Darmstadt University of Technology in Germany in 2001 and his PhD Degree (Dr. sc.) from the Swiss Federal Institute of Technology in Zurich in 2007. From 2007 to 2009 he worked as a research fellow at the A*STAR Institute of High Performance Computing in Singapore. His research interests include the development of simulation codes for electromagnetic fields as well as device optimization. He is currently with CST - Computer Simulation Technology as Market Development Manager for EDA based in Singapore.

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