Signal Integrity of Cadence Allegro Backplane Trace Import
A portion of a backplane, designed with the Cadence Allegro® layout tool, is imported into CST MICROWAVE STUDIO®. This section consists of a differential pair with vias which go through the board. The structure was analyzed in Microwave Studio. The...
Signal Integrity of High Speed Flip Chip Package
This article describes how CST MICROWAVE STUDIO® is used to analyze the signal integrity of a flip chip package. The study is to determine the effect of ground planes on insertion loss of the package signals.
Socket EM Analysis for a Semiconductor Probe Card and BGA Contact
This article demonstrates the analysis of the probe pins used for semiconductor testing. The BGA IC socket arrangement has also been simulated.
Full Package Signal Integrity Analysis
This article presents the use of CST MICROWAVE STUDIO® (CST MWS) for the simulation of large IC packages. From the time domain simulation network parameters can be extracted and further processed in CST DESIGN STUDIO™.
IC Package Simulation
In this article the simulation of parasitic effects in a standard IC package is shown. The transient simulator in CST MICROWAVE STUDIO® (CST MWS) offers the advantage, that effects such as crosstalk and signal delay can be investigated in both time and...